Wind River Blog Network

Complexity

By Mike Deliman

This afternoon I watched the press conferences for Mars Science Laboratory “Curiosity” that were hosted by NASA/JPL from Pasadena, Ca.  These conferences were broadcast over NASA-TV, both on the cable/satellite channels and over the web.  If you haven’t seen the Seven Minutes Video I encourage you to watch it.

Various scientists, directors and managers of the project discussed various aspects of the mission, including discussing how the craft does what it’s designed to.  The biggest message I carry away from today’s two conferences is “Complexity”.  This is by far the most complex robotic probe ever launched to space, perhaps the most complex robotic probe mission ever.

If you watch the video, you will notice that during the landing, the probe plummets through the atmosphere like a well-guided rock.  This is literally what it is doing – falling like a rock that knows how to keep itself upright.  It manages to do this by using guidance rockets, a heat shield with a “just right” shape, and weights that help keep one side tilted slightly towards the ground.  While it’s in this configuration, the guidance rockets make minute adjustments as needed, keeping the probe on course.  This precision guided entry is a large part of how Curiosity is able to make the landing ellipse small.  This whole phase is a series of fantastic engineering achievements.  It is tied in history to the Apollo reentry methods, where we brought astronauts back to Earth, safely.

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Identifying Backdoors in Production-Ready Code

By Ido Sarig

The security world is abuzz with news about a “backdoor” - undocumented  access to its programmatic interface -  found in a popular FPGA manufactured in China and used in US military applications.

Whether you are concerned that this is a deliberate Chinese plot to attack Western militaries, or relieved to hear that this is just a "common" backdoor, put in for debugging purposes, you should take note of the following:

"Backdoors are a common problem in software. About 20% of home routers have a backdoor in them, and 50% of industrial control computers have a backdoor. The cause of these backdoors isn't malicious, but a byproduct of software complexity. Systems need to be debugged before being shipped to customers. Therefore, the software contains debuggers. Often, programmers forget to disable the debugger backdoors before shipping.” 

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Wind River Turns 30: Looking Back and Moving Forward

By Tomas Evensen 

2011 marks Wind River’s 30th anniversary. The big 3-0…it’s a major landmark moment in anyone’s book. This year, we’ll be taking time to honor this milestone with a retrospective of Wind River’s history and also a series of employee stories.  In my many years with the company, Wind River always impressed on me the concept of  being bigger than just a single product or technology. There is an underlying spirit within our teams that constantly reaches for more, for some greater innovation. While many customers know Wind River for the VxWorks real-time operating system, it was always part of the vision to provide more value. In the early days, this entailed providing a TCP/IP stack and GDB for debugging. Later, additional value came from strong IDE support through Tornado and Workbench. Lately, it has been by providing a choice of operating systems, real-time or open source/Linux. 

A standout example that exemplified the vision of providing a more complete solution was when we embarked on creating a truly embedded hypervisor. In 2004, it had already become clear to us that virtualization would play an important role in embedded designs at some point in the future. In early 2005, Paul Borman who worked for me in the CTO Office created a very impressive prototype, called eCPU, that ran VxWorks and Linux on a single CPU and we learned a lot from that effort. When Johan Fornaeus came on board in 2006 through an acquisition (he was co-founder of Interpeak and before that, one of the co-designers of the Enea/OSE operating system), I had him leading a small nimble task force team to develop a hypervisor really suited for the embedded space. I felt we made a real breakthrough. This was not a repackaged operating system pretending to be something it was not designed for, but instead a truly unique approach to virtualization and separation. Over the next couple years, this small team created a scalable product with an extremely tight footprint, incredible performance, while at the same time being full featured for the common architectures such as Intel, Power, ARM and MIPS.

Back in those days, it was not clear to us when and how important multi-OS systems would be in the future, but today it is hard to imagine how to deal with these new complex systems without a hypervisor for embedded virtualization. Looking at my team’s achievement now, I still marvel at how the Wind River Hypervisor brings together multi-core and our various operating systems. Why choose between operating systems with different characteristics when you can mix them in one system? Throw in a networking stack optimized for multi-core and tools that can debug and find performance bottlenecks and you get a very capable foundation on which our customers can innovate.

By constantly looking to the future, Wind River continues to evolve and further build on its expertise. The ongoing push to innovate may have created interesting and complex challenges along the way. However, it has also resulted in celebrations and breakthroughs, and it’s undoubtedly a big reason why so many of us continue to stay on the ride. 

 

Debug, multicore, and more debug

By Jakob Engblom

I recently gave a talk at an industry-academia collaboration called ICES, Innovative Center for Embedded Systems, at KTH in Kista, Stockholm, Sweden. The theme was embedded multicore, and I realized that my role at these events seems to have changed. A few years ago, I would be the "embedded guy", defending the collective of embedded systems against speakers assuming that everything was a homogeneous shared-memory multiprocessor. This time was different, though. I have become the "debug fanatic."

There seems to be less need to explain embedded multicore nowadays. The academic community and multicore event participants seem to have finally accepted that there are systems out there that use more than one operating systems on a single chip (thanks to hypervisors, AMP setups, local-memory configurations, etc) and that we have hardware that is highly heterogeneous (with different makes and different types of cores all being part of a single system). In the final panel discussion, I found myself saying "build the hardware anyway you like, as long as I have good hardware debug support and introspection features".

I think this is indicative of a general truth: if you cannot debug it, you cannot build it. For multicore in particular, debug is scrambling to catch up.

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Embedded Virtualization and Multi-Core

By Mark Hermeling

VDC has released a recent report showing that multi-core is making fast inroads in embedded systems and we are seeing that at Wind River as well. There are exciting new possibilities with these chips, we have never had this much processing power in such small packages.

Take for example Freescale's new P4080 chip, 8 cores, 2 memory busses and a wealth of peripherals that are designed for multicore usage (such as the data path acceleration architecture (DPAA)). There are many things to consider with this new chip, I have blogged before about the many primary multi-core configurations available from SMP to uAMP, to sAMP to core virtualized. You have to consider partitioning, or virtualizing cores, memory and devices.

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Intuitive & Efficient Debug of Multi-core Systems

By Brian Finkel

I reflect on a recent visit with my 84-year old Aunt Honey. As you might expect, she is not an avid cell phone user. She wanted help entering contacts into her phone. She has a basic phone so we had to enter text using the “9-up” keypad. Her objective is to make phone calls by selecting someone’s name instead of typing the telephone number.   

The event had me thinking about the way we used to make telephone calls – using an address book or a phone list and then typing in the number. In my youth, things weren’t so bad – everyone lived in the same town – with the same area code and only a few prefixes. For each friend you only had to remember the 4 digits and perhaps which prefix to use. Fast forward a few years and with the advent of cell phones, IP telephony, new area codes, and geographically-dispersed friends and family – you now need to remember 10 digits. 10 digits is beyond most people’s working memory (which is typically 7 digits). Address books and phone lists were required. 

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Virtual Trace

By Jakob Engblom

I spent most of last week at the S4D conference in Southampton, the UK. A small gathering of people interested in debug, it seems to be a good indicator of trends in debug. The dominant trends this year were clearly tracing and instrumentation. From the perspective of a virtual platform, tracing is a natural task, and it can be done with much less pain than on a physical platform.

Tracing on a piece of hardware requires that the processor or SoC at the heart of the system has an interface that can communicate a trace to an external trace box, and also that the chip has built-in tracing in the hardware. The trace units we have today are much more powerful than those of just a few year's ago, but trace is still not universal, not able to capture everything, and limited by the bandwidth of the few pins you can pull out of a target for the purpose of debug. The result is that you always end up tracing only certain aspects of the execution or only certain subcomponents of an SoC. In particular data trace is not always supported, and tracing the behavior and accesses to peripheral devices is usually hard.

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Test Driven Development Meets Continuous Integration

By Paul Henderson

In my last posting I mentioned I'd be running a webinar with James Grenning on Agile testing. James is a recognized expert and frequent speaker on the topic of software development and one of the original authors of the Manifesto for Agile Software Development.

We talked about the case for agility where today's embedded software projects are inevitably faced with changing requirements and market conditions that cause unplanned, mid-course corrections. The result is what went in is often not what was expected to come out. Testing folks are the tail trying to wag the dog as they try to test in quality at the end of the project.

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ESC Silicon Valley

By Mark Hermeling

Looking forward to my trip to ESC Sillicon Valley next week. It is promising to be a busy show, especially since ESC is now combined with the Multicore expo. I just leafed through the agenda (in the form of a Nxtbook) and found a large number of sessions that I want to attend, experience show though that I'll probably be too busy talking to customer to attend sessions, which is a good problem to have of course.

I am hosting a 4 hour session (with several of my colleagues) on Multicore Demystified on Tuesday afternoon 2.30-7pm (there will be refresments!) in the Hilton Plaza Room. Do stop by either the session, or our booth at Multicore Expo for a chat if you want to brain storm about your next generation devices.

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The Multicore Transition: Tools are Key to Success

By Bill Graham

We just announced a new release of our state of the art tools which includes an update to Workbench and Workbench OCD version 3.2, plus our Wind River Compiler suite (also known as the Diab compiler). This news reminded me of my days as a product manager for tools software and the need to talk about the importance of tools to project success.

For embedded software companies where so much emphasis is given to supported hardware, operating systems and middleware technologies, tools can get ignored in the fray.

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Integrated Hardware, Software and Lasagna

By Mark Hermeling

The fact that almost everybody in North America is either packing for the holidays, or has already left gives me a chance to finally write about an exchange I had with a customer a while ago.

We were discussing how the hardware side of embedded software development had changed over the past years. Where in 'the olden days', things would start by bolting a processor on top of a breadboard of some kind, todays development typically starts with an out-of-the-box hardware solution.

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Article: Multi-Core Slow Down

By Mark Hermeling

An interesting article by Dan Woods on Multi-core slowdown. The article tries to temper people's expectations with regards to mArticle: Multi-Core Slow Downulticore. The basic argument goes: A multicore processor has more raw processing power, but it requires the software load that runs on top of that processor to be able to use those cores, if not, the software could run at the same speed as single-core, or even slower.

One of the ways to use all the cores of course is multi-threaded programming in combination with an SMP operating system that can schedule over all the cores (SMP being Symmetric Multi Processing). Typically multi-threaded programs use multiple threads of execution and use synchronization primitives to make sure executions happens in the right order.

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2009 Autumnal Equinox

By Emeka Nwafor

September 21st marks the last full day of the memorable summer of 2009, a summer that was memorable on several fronts - including personal and professional. My summer of 2009 includes memories of rainfalls of near biblical proportions, personal triumphs and losses, the passing of several social icons, and the evolution of the embedded software market.

There is some small debate as to when summer officially ends and when we must stop wearing white to work. If the sun could talk, I would guess that it would suggest that summer officially ends and fall begins at the moment of the autumnal equinox. This is the moment in the September when the sun is vertical to the equator. This year's autumnal equinox will occur on September 22nd at 17:18 ET (21:18 UTC) - just about five hours and eight minutes after the opening keynote at the 2009 Intel Developer Forum being held in San Francisco, California. This is also about nineteen and half hours before the day 2 keynote titled "Developing for the Continuum of Intel Platforms".

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Serial Intent

By Mike Deliman

Howdy out there,

I realize this is a blog that's supposed to be about real-time programming issues, and mostly I've posted about planetary and space based projects, with a few announcements about technology and news items. Though these combine subjects near and dear to my heart (space, and VxWorks), these were mostly "interest stories", not solid real-time issues. (It must be kind of like tuning into a financial news station and seeing stories about some new exotic fluffy breed of dog.)

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What's the 4-1-1 on 3.1.1?

By Emeka Nwafor

We have just announced that we are taking orders for Wind River Workbench On-Chip Debugging version 3.1.1. Here's some infomation (i.e. "the 4-1-1") on this release. Version 3.1.1 is a significant update to the software and firmware that powers our JTAG debugger units - the Wind River ICE 2 and the Wind River Probe. A couple of the highlights include our support for RMI Corporation's XLR and XLS processor lines, a new capability that strengthens our support for multicore and multithreaded processors. This component of the release was the result of some hard work and great teaming between the folks at RMI, our professional services organization, and our engineering team in Canton. The other thing that has our team excited is that version 3.1.1 introduces support for Intel Architecture starting with support for the Intel Atom product family. Intel Architecture support in our on-chip debugging solutions extends our existing coverage for ARM, MIPS, and PowerPC. These different architectures are supported using firmware updates to the same physical hardware - this is something that our clients have told me that they appreciate since the same debug solution can be used across multiple projects in there heterogeneous environments. I tend to feel a certain amount of pride everytime we execute a new release, but I'm particularly proud and nostalgic about this release. I'm proud because our clients are jazzed that we are expanding our optimized-for-multicore JTAG debugging solution to the Intel Architecture and are pleased that we have a non-intrusive debug solution for Intel that helps to abstract the debugging of operating systems and the stuff running on them - including operating systems like VxWorks and Wind River Linux.

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I love OCD

By Doug Gaff

No, I’m not talking about locking the front door exactly 3 times before going to bed or using a new bar of soap each time I wash my hands à la Jack Nicholson. I’m talking about On-Chip Debugging – using JTAG tools for device software debugging.

I got my start at Wind River working on JTAG-based debuggers. A couple of years ago, my team integrated Wind River’s JTAG emulators into our Eclipse-based product, Wind River Workbench. It was quite a challenge connecting hardware debugging to a debugging framework focused on application development, and the Device Debugging and Target Management projects spun out of that effort.

Today I manage our Eclipse open source contributions, but I still sit next to my OCD buddies. When they’re not nervously clicking their retractable pens, they’re writing firmware for our JTAG emulators. Today, they released a cool new emulator that blows away their previous products:

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Mitigating Risk

By Mike Deliman

The phone rings.  A customer has an application destined for a high-risk environment, and somewhere in test they've found a new unanticipated condition.  A "Tiger Team" is formed - a group of experts who've "been here before", who understand the priority and the risks, and know how serious it is. Many times a Tiger Team may give the go / no-go, the final answer that either saves a mission, or drops all that work into the dust-bin.  Such a team itself represents a *lot* of work, frustration, and time - investigations may run on days, weeks, or months, as long as they reach their conclusion on-time.  And there's the one facet that can't be changed by any engineering practice:  Time.

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DSDP: Yesterday, Today and Tomorrow

By Doug Gaff

Following up on today’s announcement of milestones in three of the DSDP projects—eRCP 1.0, MTJ 0.7, and TM 1.0—I thought I’d take a moment to reflect on DSDP…how it started, where it is today, and where it’s heading. First, let me start with a timeline of project events.

March 2005. Unofficially, the DSDP project got its start at a BoF session during EclispeCon last year. At the BoF, several device software tools vendors assembled to discuss the need for more embedded-specific functionality in Eclipse, specifically in the debugging area. There was acknowledgment of CDT and its extensive contribution to tooling in the embedded space, but there was also a desire to see more enhancements in the Eclipse Platform and more of a breadth of functionality around device software development. Shortly after EclipseCon, Wind River proposed the DSDP project and its two initial sub-projects, Target Management and Device Debugging. The TM project set out to build a framework and UI for managing remote embedded devices. The DD project initially focused on working with the Eclipse Platform Debug team to create a more customizable debugging framework in the Platform.

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On-Chip Debugging Content Update

Wind River has updated its on-chip debugging content, with a focus on the first Eclipse-based JTAG debugging environment and muliticore debugging.

The web site now includes the most up-to-date product literature, detailed information about processor support, a spotlight section highlighting our migration program, new tools for manufacturing and test engineers, and a new white paper. In addition, we are making it easier than ever to evaluate our products.

Please let us know what you think.

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