Scaling your Power Architecture Applications

Scaling your Power Architecture Applications

6a00d83451f5c369e201287600a6f9970c-pi

Introduction

Power Architecture has been one of the mainstays in the embedded industry and will be here for years to come. Power Architecture has powered everything from toasters to airplanes, and the latest SoCs from Freescale in the QorIQ T-series processors have lots of performance with up to 12 physical or 24 virtual (dual threaded) 64-bit processing cores, a great memory architecture, and full (40-bit physical) bit addressing capability.

Many customers in the aerospace and defense industry are still very interested in low power vs performance, device longevity of up to 15 years (which for many programs is a must), and 64-bit support, which opens up some interesting angles for them. The 32-bit memory space has been a limit for many of today’s embedded applications especially as the use of many modern PCI devices take a big chunk out of the available memory. You can, of course, use paging to address the 4 GB memory barrier, but that is kludgy and detracts from the work at hand.

Refresh for existing applications

Many aerospace and defense projects are looking to refresh existing programs and remove the 32-bit limitation. In addition, the huge performance boost of the e6500 processors is something that is very attractive to them. The e6500 core in Freescale’s processors, such as the T2080 or T4240 which are used in some of our partners boards, offers high core count multi-core processing, 40-bit physical addressable memory with 64-bit addressing, and AltiVec, all coupled with accelerators for security, pattern matching and compression.

This is great news for people building applications that can benefit from the processing power, memory space and efficiency (size/power/weight per watt). Think of signal processing applications for audio, video or radar, or other applications that need to crunch through lots of data. The new processors on boards like Curtiss Wright’s VPX3-133 or VPX6-195 allow for multiple existing applications to be combined on a single board saving space and power.

The question then quickly becomes: How to migrate from your existing design to a new design with these new processors. For example, your existing design may be on a MPC7410 single-core, 32-bit processor, which means that you have to account for the fact that the new processors are 64-bit and have multiple processing cores and threads.

Migrating to 64-bit

Taking these one step at a time, if you want to make use of bigger address spaces, you would have to convert your code from the 32-bit (or ILP32) to the 64-bit (or LP64) data model. There are good resources on the Internet to help you with this conversion, and compilers to help as well by turning on stricter type checking and disabling automatic type conversions.

The data model is not the only thing to consider. Many older applications use a kernel-based programming model, where the application runs in kernel mode. This brings performance benefits, which were especially important in older slower processors but it lacks separation, meaning that one application could corrupt the memory of another application. When transitioning from 32- to 64-bit, it is worthwhile to consider transitioning from the kernel-based programming model to a process-based programming model. This does involve inspection as to how different applications work together and replacing mutexes and semaphores with messages or other communication primitives. But, in the end, it increases separation and, hence, robustness especially when consolidating applications onto a single processor with multiple cores.

Migrating to Multi-core

The increased separation through processes also helps an application to run in a multi-core configuration. While older processors only had a single processing core, new processors have multiple cores and the inherent parallelism of these help applications run faster. However, the application needs to be able to be ready to make use of the multi-core goodness. The process separation mentioned before helps in this. Alternatively, the multiple cores can be used to run multiple applications, each on it’s own core.

The operating system needs to be able to handle multiple cores and by far the easiest way to achieve that is through Symmetric Multi-Processing (SMP). The operating system handles all the cores for the programmer, and the programmer can designate specific applications to run on a particular core or leave the scheduling fully to the operating system to achieve the highest level of utilization.

One thing to consider is that the new multi-core operating system provides true concurrency. Where on the single core processor an application was running multi-threaded on a single core. On the new processor an application will run multi-threaded on multiple cores. This will give different timing behavior and may require changes in how you protect critical sections of your program.

Virtualization

Another way to make use of high core count processors is through the use of virtualization. In SMP mode, the operating system is responsible for scheduling processes and tasks on the available cores.  But this is all done within a single operating system. Another option is to partition the multi-core part into multiple different ‘Virtual Machines’ and to load an operating system into every virtual machine (VM). This allows the architect to run multiple operating systems on the same multi-core part, whether those operating systems are of the same type (such as VxWorks), or a mixture (such as VxWorks or Linux). Virtualization allows the system architect to provide a heterogeneous mix of operating systems on a multi-core SoC.

The benefits of virtualization are numerous.  It really decouples the workload from the platform and it allows for a new degree of freedom in the design of embedded systems.

Safe and Secure

Beyond getting your application to function on these processors, we cannot lose sight of important attributes such as safety and security. These should not be afterthoughts as they have significant architectural impact. This is again where the new hardware can provide great benefits through secure boot and anti-tamper capabilities.

How To Get Started

Concepts aside, it is not that difficult to get started to explore the possibilities, and Wind River is available to assist. Wind River VxWorks, the Safe and Secure RTOS, provides full support for 64-bit applications, including support for SMP and virtualization, and, naturally, can satisfy the necessary safety and security demands. The Wind River documentation provides guidance in how to assist in the conversion from 32- to 64-bit and Wind River’s Professional Services can assist with consulting as well as outsourcing. This provides customers with all they need to start to experience the goodness of these powerful Power Architecture-based processors and explore how to migrate their applications forward.